From 69156b4c20249e7800cc09e0eef0beb3d15ac1ad Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 6 Sep 2015 18:34:38 +0000 Subject: Import llvm 3.7.0 release (r246257). --- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'lib/Target/AMDGPU/SIMachineFunctionInfo.cpp') diff --git a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index d23b92edef33..587ea63d6796 100644 --- a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -53,6 +53,7 @@ SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg( if (!LaneVGPRs.count(LaneVGPRIdx)) { unsigned LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass); LaneVGPRs[LaneVGPRIdx] = LaneVGPR; + MRI.setPhysRegUsed(LaneVGPR); // Add this register as live-in to all blocks to avoid machine verifer // complaining about use of an undefined physical register. -- cgit v1.3