diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-08-20 21:02:43 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-08-20 21:02:43 +0000 |
| commit | 15c5c77fa04cd97e1057e8a585f669fc49da0d92 (patch) | |
| tree | 9047e00a30ccb7b81dbe7227c8c883cbafb5d2dd /test/CodeGen/ARM | |
| parent | 4e20bb0468b8d0db13287e666b482eb93689be99 (diff) | |
Vendor import of llvm release_50 branch r311219:vendor/llvm/llvm-release_50-r311219
Notes
svn path=/vendor/llvm/dist/; revision=322727
svn path=/vendor/llvm/llvm-release_50-r311219/; revision=322728; tag=vendor/llvm/llvm-release_50-r311219
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/cmpxchg-O0.ll | 9 | ||||
| -rw-r--r-- | test/CodeGen/ARM/virtregrewriter-subregliveness.mir | 84 |
2 files changed, 87 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/cmpxchg-O0.ll b/test/CodeGen/ARM/cmpxchg-O0.ll index a3be72112c76..f8ad2bbbbe0e 100644 --- a/test/CodeGen/ARM/cmpxchg-O0.ll +++ b/test/CodeGen/ARM/cmpxchg-O0.ll @@ -10,11 +10,10 @@ define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind { ; CHECK: dmb ish ; CHECK: uxtb [[DESIRED:r[0-9]+]], [[DESIRED]] ; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: -; CHECK: mov{{s?}} [[STATUS:r[0-9]+]], #0 ; CHECK: ldrexb [[OLD:r[0-9]+]], [r0] ; CHECK: cmp [[OLD]], [[DESIRED]] ; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]] -; CHECK: strexb [[STATUS]], r2, [r0] +; CHECK: strexb [[STATUS:r[0-9]+]], r2, [r0] ; CHECK: cmp{{(\.w)?}} [[STATUS]], #0 ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: @@ -30,11 +29,10 @@ define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind ; CHECK: dmb ish ; CHECK: uxth [[DESIRED:r[0-9]+]], [[DESIRED]] ; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: -; CHECK: mov{{s?}} [[STATUS:r[0-9]+]], #0 ; CHECK: ldrexh [[OLD:r[0-9]+]], [r0] ; CHECK: cmp [[OLD]], [[DESIRED]] ; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]] -; CHECK: strexh [[STATUS]], r2, [r0] +; CHECK: strexh [[STATUS:r[0-9]+]], r2, [r0] ; CHECK: cmp{{(\.w)?}} [[STATUS]], #0 ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: @@ -50,11 +48,10 @@ define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind ; CHECK: dmb ish ; CHECK-NOT: uxt ; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: -; CHECK: mov{{s?}} [[STATUS:r[0-9]+]], #0 ; CHECK: ldrex [[OLD:r[0-9]+]], [r0] ; CHECK: cmp [[OLD]], [[DESIRED]] ; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]] -; CHECK: strex [[STATUS]], r2, [r0] +; CHECK: strex [[STATUS:r[0-9]+]], r2, [r0] ; CHECK: cmp{{(\.w)?}} [[STATUS]], #0 ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: diff --git a/test/CodeGen/ARM/virtregrewriter-subregliveness.mir b/test/CodeGen/ARM/virtregrewriter-subregliveness.mir new file mode 100644 index 000000000000..83335a3ccffd --- /dev/null +++ b/test/CodeGen/ARM/virtregrewriter-subregliveness.mir @@ -0,0 +1,84 @@ +# RUN: llc -o - -mtriple=thumbv7--windows-gnu -run-pass=greedy -run-pass=virtregrewriter %s | FileCheck %s +--- | + target datalayout = "e-m:w-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + target triple = "thumbv7--windows-gnu" + + define void @subregLiveThrough() { ret void } + define void @subregNotLiveThrough() { ret void } + define void @subregNotLiveThrough2() { ret void } + +... +--- +# Check that we properly recognize that r1 is live through +# the first subreg copy. +# That will materialize as an implicit use of the big register +# on that copy. +# PR34107. +# +# CHECK-LABEL: name: subregLiveThrough +name: subregLiveThrough +tracksRegLiveness: true +registers: + - { id: 0, class: gprpair } +body: | + bb.0: + liveins: %r0, %r1 + + ; That copy is being coalesced so we should use a KILL + ; placeholder. If that's not a kill that means we probably + ; not coalescing %0 and %r0_r1 and thus we are not testing + ; the problematic code anymore. + ; + ; CHECK: %r0 = KILL %r0, implicit killed %r0_r1, implicit-def %r0_r1 + ; CHECK-NEXT: %r1 = KILL %r1, implicit killed %r0_r1 + undef %0.gsub_0 = COPY %r0 + %0.gsub_1 = COPY %r1 + tBX_RET 14, _, implicit %0 + + +... + +--- +# Check that we properly recognize that r1 is *not* live through +# the first subreg copy. +# CHECK-LABEL: name: subregNotLiveThrough +name: subregNotLiveThrough +tracksRegLiveness: true +registers: + - { id: 0, class: gprpair } +body: | + bb.0: + liveins: %r0, %r1 + + ; r1 is not live through so check we are not implicitly using + ; the big register. + ; CHECK: %r0 = KILL %r0, implicit-def %r0_r1 + ; CHECK-NEXT: tBX_RET + undef %0.gsub_0 = COPY %r0 + tBX_RET 14, _, implicit %0 + + +... + +--- +# Check that we properly recognize that r1 is *not* live through +# the first subreg copy. It is defined by this copy, but is not +# through. +# CHECK-LABEL: name: subregNotLiveThrough2 +name: subregNotLiveThrough2 +tracksRegLiveness: true +registers: + - { id: 0, class: gprpair } +body: | + bb.0: + liveins: %r0, %r1 + + ; r1 is not live through so check we are not implicitly using + ; the big register. + ; CHECK: %r0 = KILL %r0, implicit-def %r1, implicit-def %r0_r1 + ; CHECK-NEXT: tBX_RET + undef %0.gsub_0 = COPY %r0, implicit-def %r1 + tBX_RET 14, _, implicit %0 + + +... |