diff options
| author | Andrew Turner <andrew@FreeBSD.org> | 2018-06-13 12:17:11 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2018-06-13 12:17:11 +0000 |
| commit | 8b47c1ae5426c8d2a9763c3ef36ec088caee31b1 (patch) | |
| tree | fd0618dbe0d5d25f8e385f21f274d4db4d64693a /sys/arm64/include/cpu.h | |
| parent | 0014ef8a04664a05072f919d23e37e51b9009b91 (diff) | |
Rename the ThunderX CPU identification macros to include the X. This is the
name people know the product by, and is consistent with the later SoC ID
macros.
Sponsored by: DARPA, AFRL
Notes
svn path=/head/; revision=335052
Diffstat (limited to 'sys/arm64/include/cpu.h')
| -rw-r--r-- | sys/arm64/include/cpu.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h index a492c3a7ed7b..4ef84333176a 100644 --- a/sys/arm64/include/cpu.h +++ b/sys/arm64/include/cpu.h @@ -89,13 +89,13 @@ #define CPU_PART_CORTEX_A75 0xD0A /* Cavium Part numbers */ -#define CPU_PART_THUNDER 0x0A1 +#define CPU_PART_THUNDERX 0x0A1 #define CPU_PART_THUNDERX_81XX 0x0A2 #define CPU_PART_THUNDERX_83XX 0x0A3 #define CPU_PART_THUNDERX2 0x0AF -#define CPU_REV_THUNDER_1_0 0x00 -#define CPU_REV_THUNDER_1_1 0x01 +#define CPU_REV_THUNDERX_1_0 0x00 +#define CPU_REV_THUNDERX_1_1 0x01 #define CPU_IMPL(midr) (((midr) >> 24) & 0xff) #define CPU_PART(midr) (((midr) >> 4) & 0xfff) @@ -137,13 +137,13 @@ * Revision(s): Pass 1.0, Pass 1.1 */ #ifdef THUNDERX_PASS_1_1_ERRATA -#define CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1 \ +#define CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1 \ (CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK | CPU_REV_MASK, \ - CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, CPU_REV_THUNDER_1_0) || \ + CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, CPU_REV_THUNDERX_1_0) || \ CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK | CPU_REV_MASK, \ - CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, CPU_REV_THUNDER_1_1)) + CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, CPU_REV_THUNDERX_1_1)) #else -#define CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1 0 +#define CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1 0 #endif |