diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-01-06 21:34:26 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-01-06 21:34:26 +0000 |
| commit | d215fd3b74b90f5dc1964610926fcc2a20f959aa (patch) | |
| tree | 0c9f21e40eae033d6760008729f37d2103e2c654 /lib/Target/RISCV/RISCVISelLowering.cpp | |
| parent | b8a2042aa938069e862750553db0e4d82d25822c (diff) | |
Vendor import of llvm release_60 branch r321788:vendor/llvm/llvm-release_60-r321788
Notes
svn path=/vendor/llvm/dist-release_60/; revision=327639
svn path=/vendor/llvm/llvm-release_60-r321788/; revision=327640; tag=vendor/llvm/llvm-release_60-r321788
Diffstat (limited to 'lib/Target/RISCV/RISCVISelLowering.cpp')
| -rw-r--r-- | lib/Target/RISCV/RISCVISelLowering.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/RISCV/RISCVISelLowering.cpp b/lib/Target/RISCV/RISCVISelLowering.cpp index 7d32954936be..805ca7dd956e 100644 --- a/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/lib/Target/RISCV/RISCVISelLowering.cpp @@ -580,7 +580,6 @@ SDValue RISCVTargetLowering::LowerFormalArguments( } MachineFunction &MF = DAG.getMachineFunction(); - MVT XLenVT = Subtarget.getXLenVT(); EVT PtrVT = getPointerTy(DAG.getDataLayout()); if (IsVarArg) @@ -593,7 +592,7 @@ SDValue RISCVTargetLowering::LowerFormalArguments( for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - assert(VA.getLocVT() == XLenVT && "Unhandled argument type"); + assert(VA.getLocVT() == Subtarget.getXLenVT() && "Unhandled argument type"); SDValue ArgValue; if (VA.isRegLoc()) ArgValue = unpackFromRegLoc(DAG, Chain, VA, DL); |