Vendor import of llvm trunk r303571: - src

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author	Dimitry Andric <dim@FreeBSD.org>	2017-05-22 19:43:28 +0000
committer	Dimitry Andric <dim@FreeBSD.org>	2017-05-22 19:43:28 +0000
commit	b5630dbadf9a2a06754194387d6b0fd9962a67f1 (patch)
tree	3fe1e2bc0dc2823ab21f06959fbb3eaca317ea29 /lib/CodeGen
parent	7af96fb3afd6725a2824a0a5ca5dad34e5e0b056 (diff)

Vendor import of llvm trunk r303571:vendor/llvm/llvm-trunk-r303571

https://llvm.org/svn/llvm-project/llvm/trunk@303571

Notes

svn path=/vendor/llvm/dist/; revision=318663 svn path=/vendor/llvm/llvm-trunk-r303571/; revision=318664; tag=vendor/llvm/llvm-trunk-r303571

Diffstat (limited to 'lib/CodeGen')

-rw-r--r--

lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

-rw-r--r--

lib/CodeGen/AtomicExpandPass.cpp

-rw-r--r--

lib/CodeGen/CMakeLists.txt

-rw-r--r--

lib/CodeGen/CodeGen.cpp

-rw-r--r--

lib/CodeGen/CodeGenPrepare.cpp

-rw-r--r--

lib/CodeGen/DwarfEHPrepare.cpp

-rw-r--r--

lib/CodeGen/GlobalISel/IRTranslator.cpp

-rw-r--r--

lib/CodeGen/GlobalISel/InstructionSelector.cpp

-rw-r--r--

lib/CodeGen/InterleavedAccessPass.cpp

-rw-r--r--

lib/CodeGen/LLVMTargetMachine.cpp

-rw-r--r--

lib/CodeGen/LiveRangeShrink.cpp

211

-rw-r--r--

lib/CodeGen/LowerEmuTLS.cpp

-rw-r--r--

lib/CodeGen/MachineBlockPlacement.cpp

-rw-r--r--

lib/CodeGen/MachineModuleInfo.cpp

-rw-r--r--

lib/CodeGen/PrologEpilogInserter.cpp

-rw-r--r--

lib/CodeGen/RegisterCoalescer.cpp

-rw-r--r--

lib/CodeGen/SafeStack.cpp

-rw-r--r--

lib/CodeGen/SafeStackColoring.cpp

-rw-r--r--

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

432

-rw-r--r--

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

-rw-r--r--

lib/CodeGen/SelectionDAG/StatepointLowering.cpp

-rw-r--r--

lib/CodeGen/StackProtector.cpp

-rw-r--r--

lib/CodeGen/TargetPassConfig.cpp

-rw-r--r--

lib/CodeGen/WinEHPrepare.cpp

24 files changed, 469 insertions, 608 deletions

diff --git a/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp b/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
index 7d945690e9c3..1b39e46ee466 100644
--- a/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
+++ b/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

@@ -13,7 +13,6 @@

#include "CodeViewDebug.h"

#include "llvm/ADT/TinyPtrVector.h"

-#include "llvm/DebugInfo/CodeView/CVTypeDumper.h"

#include "llvm/DebugInfo/CodeView/CVTypeVisitor.h"

#include "llvm/DebugInfo/CodeView/CodeView.h"

#include "llvm/DebugInfo/CodeView/Line.h"

@@ -23,6 +22,7 @@

#include "llvm/DebugInfo/CodeView/TypeDumpVisitor.h"

#include "llvm/DebugInfo/CodeView/TypeIndex.h"

#include "llvm/DebugInfo/CodeView/TypeRecord.h"

+#include "llvm/DebugInfo/CodeView/TypeTableCollection.h"

#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"

#include "llvm/IR/Constants.h"

#include "llvm/MC/MCAsmInfo.h"

@@ -469,17 +469,21 @@ void CodeViewDebug::emitTypeInformation() {

CommentPrefix += ' ';

}

- TypeDatabase TypeDB(TypeTable.records().size());

- CVTypeDumper CVTD(TypeDB);

- TypeTable.ForEachRecord([&](TypeIndex Index, ArrayRef<uint8_t> Record) {

+ TypeTableCollection Table(TypeTable.records());

+ Optional<TypeIndex> B = Table.getFirst();

+ while (B) {

+ // This will fail if the record data is invalid.

+ CVType Record = Table.getType(*B);

if (OS.isVerboseAsm()) {

// Emit a block comment describing the type record for readability.

SmallString<512> CommentBlock;

raw_svector_ostream CommentOS(CommentBlock);

ScopedPrinter SP(CommentOS);

SP.setPrefix(CommentPrefix);

- TypeDumpVisitor TDV(TypeDB, &SP, false);

- Error E = CVTD.dump(Record, TDV);

+ TypeDumpVisitor TDV(Table, &SP, false);

+ Error E = codeview::visitTypeRecord(Record, *B, TDV);

if (E) {

logAllUnhandledErrors(std::move(E), errs(), "error: ");

llvm_unreachable("produced malformed type record");

@@ -489,29 +493,10 @@ void CodeViewDebug::emitTypeInformation() {

// newline.

OS.emitRawComment(

CommentOS.str().drop_front(CommentPrefix.size() - 1).rtrim());

- } else {

-#ifndef NDEBUG

- // Assert that the type data is valid even if we aren't dumping

- // comments. The MSVC linker doesn't do much type record validation,

- // so the first link of an invalid type record can succeed while

- // subsequent links will fail with LNK1285.

- BinaryByteStream Stream(Record, llvm::support::little);

- CVTypeArray Types;

- BinaryStreamReader Reader(Stream);

- Error E = Reader.readArray(Types, Reader.getLength());

- if (!E) {

- TypeVisitorCallbacks C;

- E = codeview::visitTypeStream(Types, C);

- }

- if (E) {

- logAllUnhandledErrors(std::move(E), errs(), "error: ");

- llvm_unreachable("produced malformed type record");

- }

-#endif

}

- StringRef S(reinterpret_cast<const char *>(Record.data()), Record.size());

- OS.EmitBinaryData(S);

- });

+ OS.EmitBinaryData(Record.str_data());

+ B = Table.getNext(*B);

+ }

}

namespace {

diff --git a/lib/CodeGen/AtomicExpandPass.cpp b/lib/CodeGen/AtomicExpandPass.cpp
index 17e6be05eb42..984973cf3a3b 100644
--- a/lib/CodeGen/AtomicExpandPass.cpp
+++ b/lib/CodeGen/AtomicExpandPass.cpp

@@ -17,6 +17,7 @@

#include "llvm/CodeGen/AtomicExpandUtils.h"

#include "llvm/CodeGen/Passes.h"

+#include "llvm/CodeGen/TargetPassConfig.h"

#include "llvm/IR/Function.h"

#include "llvm/IR/IRBuilder.h"

#include "llvm/IR/InstIterator.h"

@@ -35,12 +36,10 @@ using namespace llvm;

namespace {

class AtomicExpand: public FunctionPass {

- const TargetMachine *TM;

const TargetLowering *TLI;

public:

static char ID; // Pass identification, replacement for typeid

- explicit AtomicExpand(const TargetMachine *TM = nullptr)

- : FunctionPass(ID), TM(TM), TLI(nullptr) {

+ AtomicExpand() : FunctionPass(ID), TLI(nullptr) {

initializeAtomicExpandPass(*PassRegistry::getPassRegistry());

}

@@ -97,12 +96,10 @@ namespace {

char AtomicExpand::ID = 0;

char &llvm::AtomicExpandID = AtomicExpand::ID;

-INITIALIZE_TM_PASS(AtomicExpand, "atomic-expand", "Expand Atomic instructions",

- false, false)

+INITIALIZE_PASS(AtomicExpand, "atomic-expand", "Expand Atomic instructions",

+ false, false)

-FunctionPass *llvm::createAtomicExpandPass(const TargetMachine *TM) {

- return new AtomicExpand(TM);

+FunctionPass *llvm::createAtomicExpandPass() { return new AtomicExpand(); }

namespace {

// Helper functions to retrieve the size of atomic instructions.

@@ -172,9 +169,14 @@ bool atomicSizeSupported(const TargetLowering *TLI, Inst *I) {

} // end anonymous namespace

bool AtomicExpand::runOnFunction(Function &F) {

- if (!TM || !TM->getSubtargetImpl(F)->enableAtomicExpand())

+ auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();

+ if (!TPC)

+ return false;

+ auto &TM = TPC->getTM<TargetMachine>();

+ if (!TM.getSubtargetImpl(F)->enableAtomicExpand())

return false;

- TLI = TM->getSubtargetImpl(F)->getTargetLowering();

+ TLI = TM.getSubtargetImpl(F)->getTargetLowering();

SmallVector<Instruction *, 1> AtomicInsts;

diff --git a/lib/CodeGen/CMakeLists.txt b/lib/CodeGen/CMakeLists.txt
index 55a27e2fb79e..2b5863aa5800 100644
--- a/lib/CodeGen/CMakeLists.txt
+++ b/lib/CodeGen/CMakeLists.txt

@@ -49,7 +49,6 @@ add_llvm_library(LLVMCodeGen

LivePhysRegs.cpp

LiveRangeCalc.cpp

LiveRangeEdit.cpp

- LiveRangeShrink.cpp

LiveRegMatrix.cpp

LiveRegUnits.cpp

LiveStackAnalysis.cpp

diff --git a/lib/CodeGen/CodeGen.cpp b/lib/CodeGen/CodeGen.cpp
index 4d30c6574b12..2a2715beaadc 100644
--- a/lib/CodeGen/CodeGen.cpp
+++ b/lib/CodeGen/CodeGen.cpp

@@ -43,7 +43,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {

initializeLiveDebugValuesPass(Registry);

initializeLiveDebugVariablesPass(Registry);

initializeLiveIntervalsPass(Registry);

- initializeLiveRangeShrinkPass(Registry);

initializeLiveStacksPass(Registry);

initializeLiveVariablesPass(Registry);

initializeLocalStackSlotPassPass(Registry);

diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp
index f2e024c5e3bd..3a1a3020a8d4 100644
--- a/lib/CodeGen/CodeGenPrepare.cpp
+++ b/lib/CodeGen/CodeGenPrepare.cpp

@@ -14,6 +14,7 @@

//===----------------------------------------------------------------------===//

#include "llvm/CodeGen/Passes.h"

+#include "llvm/CodeGen/TargetPassConfig.h"

#include "llvm/ADT/DenseMap.h"

#include "llvm/ADT/SetVector.h"

#include "llvm/ADT/SmallSet.h"

@@ -197,10 +198,11 @@ class TypePromotionTransaction;

public:

static char ID; // Pass identification, replacement for typeid

- explicit CodeGenPrepare(const TargetMachine *TM = nullptr)

- : FunctionPass(ID), TM(TM), TLI(nullptr), TTI(nullptr), DL(nullptr) {

- initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());

- }

+ CodeGenPrepare()

+ : FunctionPass(ID), TM(nullptr), TLI(nullptr), TTI(nullptr),

+ DL(nullptr) {

+ initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());

+ }

bool runOnFunction(Function &F) override;

StringRef getPassName() const override { return "CodeGen Prepare"; }

@@ -255,15 +257,13 @@ class TypePromotionTransaction;

}

char CodeGenPrepare::ID = 0;

-INITIALIZE_TM_PASS_BEGIN(CodeGenPrepare, "codegenprepare",

- "Optimize for code generation", false, false)

+INITIALIZE_PASS_BEGIN(CodeGenPrepare, "codegenprepare",

+ "Optimize for code generation", false, false)

INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)

-INITIALIZE_TM_PASS_END(CodeGenPrepare, "codegenprepare",

- "Optimize for code generation", false, false)

+INITIALIZE_PASS_END(CodeGenPrepare, "codegenprepare",

+ "Optimize for code generation", false, false)

-FunctionPass *llvm::createCodeGenPreparePass(const TargetMachine *TM) {

- return new CodeGenPrepare(TM);

+FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }

bool CodeGenPrepare::runOnFunction(Function &F) {

if (skipFunction(F))

@@ -279,7 +279,8 @@ bool CodeGenPrepare::runOnFunction(Function &F) {

BPI.reset();

ModifiedDT = false;

- if (TM) {

+ if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) {

+ TM = &TPC->getTM<TargetMachine>();

SubtargetInfo = TM->getSubtargetImpl(F);

TLI = SubtargetInfo->getTargetLowering();

TRI = SubtargetInfo->getRegisterInfo();

@@ -349,7 +350,7 @@ bool CodeGenPrepare::runOnFunction(Function &F) {

// Really free removed instructions during promotion.

for (Instruction *I : RemovedInsts)

- delete I;

+ I->deleteValue();

EverMadeChange |= MadeChange;

}

diff --git a/lib/CodeGen/DwarfEHPrepare.cpp b/lib/CodeGen/DwarfEHPrepare.cpp
index 38af19a04448..1ef4d8660657 100644
--- a/lib/CodeGen/DwarfEHPrepare.cpp
+++ b/lib/CodeGen/DwarfEHPrepare.cpp

@@ -13,6 +13,7 @@

//===----------------------------------------------------------------------===//

#include "llvm/CodeGen/Passes.h"

+#include "llvm/CodeGen/TargetPassConfig.h"

#include "llvm/ADT/BitVector.h"

#include "llvm/ADT/Statistic.h"

#include "llvm/Analysis/CFG.h"

@@ -34,8 +35,6 @@ STATISTIC(NumResumesLowered, "Number of resume calls lowered");

namespace {

class DwarfEHPrepare : public FunctionPass {

- const TargetMachine *TM;

// RewindFunction - _Unwind_Resume or the target equivalent.

Constant *RewindFunction;

@@ -52,15 +51,9 @@ namespace {

public:

static char ID; // Pass identification, replacement for typeid.

- // INITIALIZE_TM_PASS requires a default constructor, but it isn't used in

- // practice.

DwarfEHPrepare()

- : FunctionPass(ID), TM(nullptr), RewindFunction(nullptr), DT(nullptr),

- TLI(nullptr) {}

- DwarfEHPrepare(const TargetMachine *TM)

- : FunctionPass(ID), TM(TM), RewindFunction(nullptr), DT(nullptr),

- TLI(nullptr) {}

+ : FunctionPass(ID), RewindFunction(nullptr), DT(nullptr), TLI(nullptr) {

+ }

bool runOnFunction(Function &Fn) override;

@@ -78,18 +71,18 @@ namespace {

} // end anonymous namespace

char DwarfEHPrepare::ID = 0;

-INITIALIZE_TM_PASS_BEGIN(DwarfEHPrepare, "dwarfehprepare",

- "Prepare DWARF exceptions", false, false)

+INITIALIZE_PASS_BEGIN(DwarfEHPrepare, "dwarfehprepare",

+ "Prepare DWARF exceptions", false, false)

INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)

+INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)

INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)

-INITIALIZE_TM_PASS_END(DwarfEHPrepare, "dwarfehprepare",

- "Prepare DWARF exceptions", false, false)

+INITIALIZE_PASS_END(DwarfEHPrepare, "dwarfehprepare",

+ "Prepare DWARF exceptions", false, false)

-FunctionPass *llvm::createDwarfEHPass(const TargetMachine *TM) {

- return new DwarfEHPrepare(TM);

+FunctionPass *llvm::createDwarfEHPass() { return new DwarfEHPrepare(); }

void DwarfEHPrepare::getAnalysisUsage(AnalysisUsage &AU) const {

+ AU.addRequired<TargetPassConfig>();

AU.addRequired<TargetTransformInfoWrapperPass>();

AU.addRequired<DominatorTreeWrapperPass>();

}

@@ -254,9 +247,10 @@ bool DwarfEHPrepare::InsertUnwindResumeCalls(Function &Fn) {

}

bool DwarfEHPrepare::runOnFunction(Function &Fn) {

- assert(TM && "DWARF EH preparation requires a target machine");

+ const TargetMachine &TM =

+ getAnalysis<TargetPassConfig>().getTM<TargetMachine>();

DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();

- TLI = TM->getSubtargetImpl(Fn)->getTargetLowering();

+ TLI = TM.getSubtargetImpl(Fn)->getTargetLowering();

bool Changed = InsertUnwindResumeCalls(Fn);

DT = nullptr;

TLI = nullptr;

diff --git a/lib/CodeGen/GlobalISel/IRTranslator.cpp b/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 77dfb13ac1f2..afc18a15aa1c 100644
--- a/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/lib/CodeGen/GlobalISel/IRTranslator.cpp

@@ -340,6 +340,15 @@ bool IRTranslator::translateExtractValue(const User &U,

Type *Int32Ty = Type::getInt32Ty(U.getContext());

SmallVector<Value *, 1> Indices;

+ // If Src is a single element ConstantStruct, translate extractvalue

+ // to that element to avoid inserting a cast instruction.

+ if (auto CS = dyn_cast<ConstantStruct>(Src))

+ if (CS->getNumOperands() == 1) {

+ unsigned Res = getOrCreateVReg(*CS->getOperand(0));

+ ValToVReg[&U] = Res;

+ return true;

+ }

// getIndexedOffsetInType is designed for GEPs, so the first index is the

// usual array element rather than looking into the actual aggregate.

Indices.push_back(ConstantInt::get(Int32Ty, 0));

@@ -1108,6 +1117,23 @@ bool IRTranslator::translate(const Constant &C, unsigned Reg) {

default:

return false;

}

+ } else if (auto CS = dyn_cast<ConstantStruct>(&C)) {

+ // Return the element if it is a single element ConstantStruct.

+ if (CS->getNumOperands() == 1) {

+ unsigned EltReg = getOrCreateVReg(*CS->getOperand(0));

+ EntryBuilder.buildCast(Reg, EltReg);

+ return true;

+ }

+ SmallVector<unsigned, 4> Ops;

+ SmallVector<uint64_t, 4> Indices;

+ uint64_t Offset = 0;

+ for (unsigned i = 0; i < CS->getNumOperands(); ++i) {

+ unsigned OpReg = getOrCreateVReg(*CS->getOperand(i));

+ Ops.push_back(OpReg);

+ Indices.push_back(Offset);

+ Offset += MRI->getType(OpReg).getSizeInBits();

+ }

+ EntryBuilder.buildSequence(Reg, Ops, Indices);

} else if (auto CV = dyn_cast<ConstantVector>(&C)) {

if (CV->getNumOperands() == 1)

return translate(*CV->getOperand(0), Reg);

diff --git a/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/lib/CodeGen/GlobalISel/InstructionSelector.cpp
index c67da8629a3b..4c0b06dffd21 100644
--- a/lib/CodeGen/GlobalISel/InstructionSelector.cpp
+++ b/lib/CodeGen/GlobalISel/InstructionSelector.cpp

@@ -73,7 +73,7 @@ bool InstructionSelector::isOperandImmEqual(

const MachineOperand &MO, int64_t Value,

const MachineRegisterInfo &MRI) const {

- if (MO.getReg())

+ if (MO.isReg() && MO.getReg())

if (auto VRegVal = getConstantVRegVal(MO.getReg(), MRI))

return *VRegVal == Value;

return false;

diff --git a/lib/CodeGen/InterleavedAccessPass.cpp b/lib/CodeGen/InterleavedAccessPass.cpp
index ec35b3f6449e..bb29db301a95 100644
--- a/lib/CodeGen/InterleavedAccessPass.cpp
+++ b/lib/CodeGen/InterleavedAccessPass.cpp

@@ -45,6 +45,7 @@

//===----------------------------------------------------------------------===//

#include "llvm/CodeGen/Passes.h"

+#include "llvm/CodeGen/TargetPassConfig.h"

#include "llvm/IR/Dominators.h"

#include "llvm/IR/InstIterator.h"

#include "llvm/Support/Debug.h"

@@ -68,8 +69,7 @@ class InterleavedAccess : public FunctionPass {

public:

static char ID;

- InterleavedAccess(const TargetMachine *TM = nullptr)

- : FunctionPass(ID), DT(nullptr), TM(TM), TLI(nullptr) {

+ InterleavedAccess() : FunctionPass(ID), DT(nullptr), TLI(nullptr) {

initializeInterleavedAccessPass(*PassRegistry::getPassRegistry());

}

@@ -84,7 +84,6 @@ public:

private:

DominatorTree *DT;

- const TargetMachine *TM;

const TargetLowering *TLI;

/// The maximum supported interleave factor.

@@ -108,18 +107,18 @@ private:

} // end anonymous namespace.

char InterleavedAccess::ID = 0;

-INITIALIZE_TM_PASS_BEGIN(

+INITIALIZE_PASS_BEGIN(

InterleavedAccess, "interleaved-access",

"Lower interleaved memory accesses to target specific intrinsics", false,

false)

INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)

-INITIALIZE_TM_PASS_END(

+INITIALIZE_PASS_END(

InterleavedAccess, "interleaved-access",

"Lower interleaved memory accesses to target specific intrinsics", false,

false)

-FunctionPass *llvm::createInterleavedAccessPass(const TargetMachine *TM) {

- return new InterleavedAccess(TM);

+FunctionPass *llvm::createInterleavedAccessPass() {

+ return new InterleavedAccess();

}

/// \brief Check if the mask is a DE-interleave mask of the given factor

@@ -426,13 +425,15 @@ bool InterleavedAccess::lowerInterleavedStore(

}

bool InterleavedAccess::runOnFunction(Function &F) {

- if (!TM || !LowerInterleavedAccesses)

+ auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();

+ if (!TPC || !LowerInterleavedAccesses)

return false;

DEBUG(dbgs() << "*** " << getPassName() << ": " << F.getName() << "\n");

DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();

- TLI = TM->getSubtargetImpl(F)->getTargetLowering();

+ auto &TM = TPC->getTM<TargetMachine>();

+ TLI = TM.getSubtargetImpl(F)->getTargetLowering();

MaxFactor = TLI->getMaxSupportedInterleaveFactor();

// Holds dead instructions that will be erased later.

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 7b1706f0f4ba..be3b258315bb 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp

@@ -109,26 +109,24 @@ addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,

AnalysisID StopAfter,

MachineFunctionInitializer *MFInitializer = nullptr) {

- // When in emulated TLS mode, add the LowerEmuTLS pass.

- if (TM->Options.EmulatedTLS)

- PM.add(createLowerEmuTLSPass(TM));

- PM.add(createPreISelIntrinsicLoweringPass());

- // Add internal analysis passes from the target machine.

- PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));

// Targets may override createPassConfig to provide a target-specific

// subclass.

TargetPassConfig *PassConfig = TM->createPassConfig(PM);

PassConfig->setStartStopPasses(StartBefore, StartAfter, StopBefore,

StopAfter);

// Set PassConfig options provided by TargetMachine.

PassConfig->setDisableVerify(DisableVerify);

PM.add(PassConfig);

+ // When in emulated TLS mode, add the LowerEmuTLS pass.

+ if (TM->Options.EmulatedTLS)

+ PM.add(createLowerEmuTLSPass());

+ PM.add(createPreISelIntrinsicLoweringPass());

+ // Add internal analysis passes from the target machine.

+ PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));

PassConfig->addIRPasses();

PassConfig->addCodeGenPrepare();

diff --git a/lib/CodeGen/LiveRangeShrink.cpp b/lib/CodeGen/LiveRangeShrink.cpp
deleted file mode 100644
index 00182e2c779f..000000000000
--- a/lib/CodeGen/LiveRangeShrink.cpp
+++ /dev/null

@@ -1,211 +0,0 @@

-//===-- LiveRangeShrink.cpp - Move instructions to shrink live range ------===//

-//

-// The LLVM Compiler Infrastructure

-//

-// This file is distributed under the University of Illinois Open Source

-// License. See LICENSE.TXT for details.

-//

-///===---------------------------------------------------------------------===//

-///

-/// \file

-/// This pass moves instructions close to the definition of its operands to

-/// shrink live range of the def instruction. The code motion is limited within

-/// the basic block. The moved instruction should have 1 def, and more than one

-/// uses, all of which are the only use of the def.

-///

-///===---------------------------------------------------------------------===//

-#include "llvm/CodeGen/MachineFunctionPass.h"

-#include "llvm/CodeGen/MachineRegisterInfo.h"

-#include "llvm/CodeGen/Passes.h"

-#include "llvm/ADT/Statistic.h"

-#include "llvm/Support/Debug.h"

-#define DEBUG_TYPE "lrshrink"

-STATISTIC(NumInstrsHoistedToShrinkLiveRange,

- "Number of insructions hoisted to shrink live range.");

-using namespace llvm;

-namespace {

-class LiveRangeShrink : public MachineFunctionPass {

-public:

- static char ID;

- LiveRangeShrink() : MachineFunctionPass(ID) {

- initializeLiveRangeShrinkPass(*PassRegistry::getPassRegistry());

- }

- void getAnalysisUsage(AnalysisUsage &AU) const override {

- AU.setPreservesCFG();

- MachineFunctionPass::getAnalysisUsage(AU);

- }

- StringRef getPassName() const override { return "Live Range Shrink"; }

- bool runOnMachineFunction(MachineFunction &MF) override;

-};

-} // End anonymous namespace.

-char LiveRangeShrink::ID = 0;

-char &llvm::LiveRangeShrinkID = LiveRangeShrink::ID;

-INITIALIZE_PASS(LiveRangeShrink, "lrshrink", "Live Range Shrink Pass", false,

- false)

-namespace {

-typedef DenseMap<MachineInstr *, unsigned> InstOrderMap;

-/// Returns \p New if it's dominated by \p Old, otherwise return \p Old.

-/// \p M maintains a map from instruction to its dominating order that satisfies

-/// M[A] > M[B] guarantees that A is dominated by B.

-/// If \p New is not in \p M, return \p Old. Otherwise if \p Old is null, return

-/// \p New.

-MachineInstr *FindDominatedInstruction(MachineInstr &New, MachineInstr *Old,

- const InstOrderMap &M) {

- auto NewIter = M.find(&New);

- if (NewIter == M.end())

- return Old;

- if (Old == nullptr)

- return &New;

- unsigned OrderOld = M.find(Old)->second;

- unsigned OrderNew = NewIter->second;

- if (OrderOld != OrderNew)

- return OrderOld < OrderNew ? &New : Old;

- // OrderOld == OrderNew, we need to iterate down from Old to see if it

- // can reach New, if yes, New is dominated by Old.

- for (MachineInstr *I = Old->getNextNode(); M.find(I)->second == OrderNew;

- I = I->getNextNode())

- if (I == &New)

- return &New;

- return Old;

-/// Builds Instruction to its dominating order number map \p M by traversing

-/// from instruction \p Start.

-void BuildInstOrderMap(MachineBasicBlock::iterator Start, InstOrderMap &M) {

- M.clear();

- unsigned i = 0;

- for (MachineInstr &I : make_range(Start, Start->getParent()->end()))

- M[&I] = i++;

-} // end anonymous namespace

-bool LiveRangeShrink::runOnMachineFunction(MachineFunction &MF) {

- if (skipFunction(*MF.getFunction()))

- return false;

- MachineRegisterInfo &MRI = MF.getRegInfo();

- DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');

- InstOrderMap IOM;

- // Map from register to instruction order (value of IOM) where the

- // register is used last. When moving instructions up, we need to

- // make sure all its defs (including dead def) will not cross its

- // last use when moving up.

- DenseMap<unsigned, unsigned> UseMap;

- for (MachineBasicBlock &MBB : MF) {

- if (MBB.empty())

- continue;

- bool SawStore = false;

- BuildInstOrderMap(MBB.begin(), IOM);

- UseMap.clear();

- for (MachineBasicBlock::iterator Next = MBB.begin(); Next != MBB.end();) {

- MachineInstr &MI = *Next;

- ++Next;

- if (MI.isPHI() || MI.isDebugValue())

- continue;

- if (MI.mayStore())

- SawStore = true;

- unsigned CurrentOrder = IOM[&MI];

- unsigned Barrier = 0;

- for (const MachineOperand &MO : MI.operands()) {

- if (!MO.isReg() || MO.isDebug())

- continue;

- if (MO.isUse())

- UseMap[MO.getReg()] = CurrentOrder;

- else if (MO.isDead() && UseMap.count(MO.getReg()))

- // Barrier is the last instruction where MO get used. MI should not

- // be moved above Barrier.

- Barrier = std::max(Barrier, UseMap[MO.getReg()]);

- }

- if (!MI.isSafeToMove(nullptr, SawStore)) {

- // If MI has side effects, it should become a barrier for code motion.

- // IOM is rebuild from the next instruction to prevent later

- // instructions from being moved before this MI.

- if (MI.hasUnmodeledSideEffects() && Next != MBB.end()) {

- BuildInstOrderMap(Next, IOM);

- SawStore = false;

- }

- continue;

- }

- const MachineOperand *DefMO = nullptr;

- MachineInstr *Insert = nullptr;

- // Number of live-ranges that will be shortened. We do not count

- // live-ranges that are defined by a COPY as it could be coalesced later.

- unsigned NumEligibleUse = 0;

- for (const MachineOperand &MO : MI.operands()) {

- if (!MO.isReg() || MO.isDead() || MO.isDebug())

- continue;

- unsigned Reg = MO.getReg();

- // Do not move the instruction if it def/uses a physical register,

- // unless it is a constant physical register.

- if (TargetRegisterInfo::isPhysicalRegister(Reg) &&

- !MRI.isConstantPhysReg(Reg)) {

- Insert = nullptr;

- break;

- }

- if (MO.isDef()) {

- // Do not move if there is more than one def.

- if (DefMO) {

- Insert = nullptr;

- break;

- }

- DefMO = &MO;

- } else if (MRI.hasOneNonDBGUse(Reg) && MRI.hasOneDef(Reg)) {

- MachineInstr &DefInstr = *MRI.def_instr_begin(Reg);

- if (!DefInstr.isCopy())

- NumEligibleUse++;

- Insert = FindDominatedInstruction(DefInstr, Insert, IOM);

- } else {

- Insert = nullptr;

- break;

- }

- // Move the instruction when # of shrunk live range > 1.

- if (DefMO && Insert && NumEligibleUse > 1 && Barrier <= IOM[Insert]) {

- MachineBasicBlock::iterator I = std::next(Insert->getIterator());

- // Skip all the PHI and debug instructions.

- while (I != MBB.end() && (I->isPHI() || I->isDebugValue()))

- I = std::next(I);

- if (I == MI.getIterator())

- continue;

- // Update the dominator order to be the same as the insertion point.

- // We do this to maintain a non-decreasing order without need to update

- // all instruction orders after the insertion point.

- unsigned NewOrder = IOM[&*I];

- IOM[&MI] = NewOrder;

- NumInstrsHoistedToShrinkLiveRange++;

- // Find MI's debug value following MI.

- MachineBasicBlock::iterator EndIter = std::next(MI.getIterator());

- if (MI.getOperand(0).isReg())

- for (; EndIter != MBB.end() && EndIter->isDebugValue() &&

- EndIter->getOperand(0).isReg() &&

- EndIter->getOperand(0).getReg() == MI.getOperand(0).getReg();

- ++EndIter, ++Next)

- IOM[&*EndIter] = NewOrder;

- MBB.splice(I, &MBB, MI.getIterator(), EndIter);

- }

- return false;

diff --git a/lib/CodeGen/LowerEmuTLS.cpp b/lib/CodeGen/LowerEmuTLS.cpp
index 6966c8ca4a5f..5fb5b747f471 100644
--- a/lib/CodeGen/LowerEmuTLS.cpp
+++ b/lib/CodeGen/LowerEmuTLS.cpp

@@ -16,6 +16,7 @@

#include "llvm/ADT/SmallVector.h"

#include "llvm/CodeGen/Passes.h"

+#include "llvm/CodeGen/TargetPassConfig.h"

#include "llvm/IR/LLVMContext.h"

#include "llvm/IR/Module.h"

#include "llvm/Pass.h"

@@ -28,14 +29,12 @@ using namespace llvm;

namespace {

class LowerEmuTLS : public ModulePass {

- const TargetMachine *TM;

public:

static char ID; // Pass identification, replacement for typeid

- explicit LowerEmuTLS() : ModulePass(ID), TM(nullptr) { }

- explicit LowerEmuTLS(const TargetMachine *TM)

- : ModulePass(ID), TM(TM) {

+ LowerEmuTLS() : ModulePass(ID) {

initializeLowerEmuTLSPass(*PassRegistry::getPassRegistry());

}

bool runOnModule(Module &M) override;

private:

bool addEmuTlsVar(Module &M, const GlobalVariable *GV);

@@ -55,18 +54,21 @@ private:

char LowerEmuTLS::ID = 0;

INITIALIZE_PASS(LowerEmuTLS, "loweremutls",

- "Add __emutls_[vt]. variables for emultated TLS model",

- false, false)

+ "Add __emutls_[vt]. variables for emultated TLS model", false,

+ false)

-ModulePass *llvm::createLowerEmuTLSPass(const TargetMachine *TM) {

- return new LowerEmuTLS(TM);

+ModulePass *llvm::createLowerEmuTLSPass() { return new LowerEmuTLS(); }

bool LowerEmuTLS::runOnModule(Module &M) {

if (skipModule(M))

return false;

- if (!TM || !TM->Options.EmulatedTLS)

+ auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();

+ if (!TPC)

+ return false;

+ auto &TM = TPC->getTM<TargetMachine>();

+ if (!TM.Options.EmulatedTLS)

return false;

bool Changed = false;

diff --git a/lib/CodeGen/MachineBlockPlacement.cpp b/lib/CodeGen/MachineBlockPlacement.cpp
index 5003115a770f..adfca9a46239 100644
--- a/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/lib/CodeGen/MachineBlockPlacement.cpp

@@ -245,25 +245,26 @@ public:

/// updating the block -> chain mapping. It does not free or tear down the

/// old chain, but the old chain's block list is no longer valid.

void merge(MachineBasicBlock *BB, BlockChain *Chain) {

- assert(BB);

- assert(!Blocks.empty());

+ assert(BB && "Can't merge a null block.");

+ assert(!Blocks.empty() && "Can't merge into an empty chain.");

// Fast path in case we don't have a chain already.

if (!Chain) {

- assert(!BlockToChain[BB]);

+ assert(!BlockToChain[BB] &&

+ "Passed chain is null, but BB has entry in BlockToChain.");

Blocks.push_back(BB);

BlockToChain[BB] = this;

return;

}

- assert(BB == *Chain->begin());

+ assert(BB == *Chain->begin() && "Passed BB is not head of Chain.");

assert(Chain->begin() != Chain->end());

// Update the incoming blocks to point to this chain, and add them to the

// chain structure.

for (MachineBasicBlock *ChainBB : *Chain) {

Blocks.push_back(ChainBB);

- assert(BlockToChain[ChainBB] == Chain && "Incoming blocks not in chain");

+ assert(BlockToChain[ChainBB] == Chain && "Incoming blocks not in chain.");

BlockToChain[ChainBB] = this;

}

@@ -1547,13 +1548,15 @@ MachineBasicBlock *MachineBlockPlacement::selectBestCandidateBlock(

MachineBasicBlock *BestBlock = nullptr;

BlockFrequency BestFreq;

for (MachineBasicBlock *MBB : WorkList) {

- assert(MBB->isEHPad() == IsEHPad);

+ assert(MBB->isEHPad() == IsEHPad &&

+ "EHPad mismatch between block and work list.");

BlockChain &SuccChain = *BlockToChain[MBB];

if (&SuccChain == &Chain)

continue;

- assert(SuccChain.UnscheduledPredecessors == 0 && "Found CFG-violating block");

+ assert(SuccChain.UnscheduledPredecessors == 0 &&

+ "Found CFG-violating block");

BlockFrequency CandidateFreq = MBFI->getBlockFreq(MBB);

DEBUG(dbgs() << " " << getBlockName(MBB) << " -> ";

@@ -1621,9 +1624,12 @@ void MachineBlockPlacement::fillWorkLists(

if (!UpdatedPreds.insert(&Chain).second)

return;

- assert(Chain.UnscheduledPredecessors == 0);

+ assert(

+ Chain.UnscheduledPredecessors == 0 &&

+ "Attempting to place block with unscheduled predecessors in worklist.");

for (MachineBasicBlock *ChainBB : Chain) {

- assert(BlockToChain[ChainBB] == &Chain);

+ assert(BlockToChain[ChainBB] == &Chain &&

+ "Block in chain doesn't match BlockToChain map.");

for (MachineBasicBlock *Pred : ChainBB->predecessors()) {

if (BlockFilter && !BlockFilter->count(Pred))

continue;

@@ -2136,8 +2142,10 @@ void MachineBlockPlacement::buildLoopChains(const MachineLoop &L) {

for (const MachineLoop *InnerLoop : L)

buildLoopChains(*InnerLoop);

- assert(BlockWorkList.empty());

- assert(EHPadWorkList.empty());

+ assert(BlockWorkList.empty() &&

+ "BlockWorkList not empty when starting to build loop chains.");

+ assert(EHPadWorkList.empty() &&

+ "EHPadWorkList not empty when starting to build loop chains.");

BlockFilterSet LoopBlockSet = collectLoopBlockSet(L);

// Check if we have profile data for this function. If yes, we will rotate

@@ -2167,7 +2175,8 @@ void MachineBlockPlacement::buildLoopChains(const MachineLoop &L) {

// walk the blocks, and use a set to prevent visiting a particular chain

// twice.

SmallPtrSet<BlockChain *, 4> UpdatedPreds;

- assert(LoopChain.UnscheduledPredecessors == 0);

+ assert(LoopChain.UnscheduledPredecessors == 0 &&

+ "LoopChain should not have unscheduled predecessors.");

UpdatedPreds.insert(&LoopChain);

for (const MachineBasicBlock *LoopBB : LoopBlockSet)

@@ -2256,8 +2265,10 @@ void MachineBlockPlacement::buildCFGChains() {

for (