@hackage clash-prelude1.10.0

Clash: a functional hardware description language - Prelude library

  • Installation

  • Tested Compilers

  • Dependencies (40)

  • Dependents (22)

    @hackage/clash-protocols, @hackage/clash-verilog, @hackage/clash-systemverilog, @hackage/clash-lib, @hackage/clash-shockwaves, @hackage/clash-vhdl, Show all…

    • Package Flags

      large-tuples
       (off by default)

      Generate instances for classes such as NFDataX and BitPack for tuples up to and including 62 elements - the GHC imposed maximum. Note that this greatly increases compile times for `clash-prelude`.

      super-strict
       (off by default)

      Use deepseqX (instead of seqX) in register-like constructs. This can help to eliminate space leaks when using lazy data structures in registers-like constructs. This potentially slows down Clash hardware simulation.

      strict-mapsignal
       (off by default)

      Use seqX in mapSignal#. This can help to eliminate space leaks in long running simulations.

      doctests
       (on by default)

      You can disable testing with doctests using `-f-doctests`.

      unittests
       (on by default)

      You can disable testing with unittests using `-f-unittests`.

      benchmarks
       (on by default)

      You can disable testing with benchmarks using `-f-benchmarks`.

      workaround-ghc-mmap-crash
       (off by default)

      Only use this flag when hit by GHC bug #19421. See clash-compiler PR #2444.

Clash - A functional hardware description language

Pipeline status Hackage

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed, yet with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

Open-source community

Clash benefits from an active community. Whether you need a question answered or want to contribute to open-source features, browse the features below to make the most of Clash.